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lt;<A Commentary on Boethius' De Trinitate by Thierry of Chartres (Anonymus Berolinensis)>>, AHDL 23, 1956, 292 (et n.
0 supports HDL-based logic design of the 3,000 gate on-chip CPLD, using MINC's AHDL.
Often, AHDL designs that have been tested and debugged in discrete components or EPLDs may be copied into PSDsoft and migrated to the programmable logic on the PSD device with minimal modification.