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Address Strobe

   Also found in: Acronyms 0.02 sec.
(storage)Address Strobe - (AS) One of the input signals of a memory device, especially semiconductor memory, which is asserted to tell the memory device that the address inputs are valid. Upon receiving this signal the selected memory device starts the memory access (read/write) indicated by its other inputs.

It may be driven directly by the processor or by a memory controller.


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Mitsubishi's 256-Mbit DDR SDRAM is available in 64-megaword x 4-bit (64M x 4) and 32M x 8 configurations (M2S56D20TP and M2S56D30TP, respectively), and supports column address strobe latencies (CL) of CL 1.
5-ns clock cycle operation supports a Column Address Strobe (CAS) Latency of 3.
25-micron CMOS process technology, Mitsubishi's JEDEC-standard 64-Mb DDR SDRAM supports column address strobe latencies (CL) as stringent as CL 1.
 
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