Also found in: Acronyms.
one of the basic units of electronic digital computers in which arithmetic and logical operations on numbers are performed directly. The performance of any arithmetic or logical operation in the unit is reduced, essentially, to a series of elementary operations, or microoperations. These include the setting of any digit of arithmetic unit blocks to 0, acceptance of a number code or individual digit, the output of code, obtaining the inverse (reciprocal) of a number code, addition of codes, shift of code to the side of the lower-order or higher-order digits of a number, and so forth.
Arithmetic operations include addition, subtraction, multiplication, division, and root extraction. The latter two operations as well as raising to a power, determination of logarithms, trigonometric functions, and others are often performed by standard subprograms. The basic operation of the digital computer is addition, to which all arithmetic operations are reduced. For example, the subtraction of the number B from the number A is replaced by addition by means of the relation A - B = A + (-B), where both numbers can be represented by a direct, reciprocal, or complement code; multiplication is reduced to the multiple summation of multiplicands; division is reduced to sequential determination of the quotient’s digits using addition and subtraction.
The digital computer’s arithmetic unit is connected with a storage unit and a central control unit. The initial numbers are brought from the storage unit by a command of the central control unit—“add,” “subtract,” “multiply,” and so forth. The arithmetic unit carries out the proper operations, the results of the operations are transmitted back to the storage unit, and the operation termination signals, the overflow indications of the word format, and so forth are, by necessity, transmitted to the central control unit.
The basic characteristics and structure of the arithmetic unit depend on the numeration system being used, the digit order number, the required high speed, the algorithms for performing and speeding up the operations, the form of representing the numbers, and the type of circuits used and the connections between them (potential, pulse, or pulse-potential).
The arithmetic unit usually consists of several registers for short-term storage of numbers, adders, logic circuits for performing elementary operations on numbers, and a local control unit which receives a command to execute an operation from the computer’s central control unit and works out the necessary sequence of individual commands.
Depending on which process is used to sum numbers, there are arithmetic units of serial, parallel, and serial-parallel action. In serial arithmetic units, the summation of two numbers is performed by a single-digit adder, through which all the digits of the addends pass sequentially, beginning with the lowest order. In parallel arithmetic units, all the digits of each of the addends are transferred to the adder simultaneously. The number of digits in the adder corresponds to the number of digits in the addends. The serial-parallel arithmetic unit is the intermediate form between these two types. The registers of a parallel arithmetic unit are constructed from flip-flops or analogous components and provide simultaneous access to all digits of the number. In serial units, delay lines, which if necessary close into a loop through the amplifiers, and logic recycling circuits are also used as registers. Electronic tubes (in early models), transistors, semiconductor diodes, ferrite-transistor cells, and core-diode cells are used in the components and circuits of the arithmetic unit. In the structure of local control units of arithmetic units with microprogrammed control, ferrite matrices are also used to store microprograms of operations.
The general requirements of the components of the arithmetic unit’s circuits are high reliability, interchangeability of similar elements, technological effectiveness, and repetition of basic characteristics in production. Depending on the process of coding numbers, the units are constructed for operations in the binary or decimal system—more rarely, in ternary or some other numeration system with a different number of digits with numbers that are represented by fixed or floating points, or with those and others.
Methods of speeding up operations are adapted to either the arithmetic unit’s elementary operations (parts of complete operations) or to complete operations. The acceleration of the elementary summation operation is particularly effective, inasmuch as it is an essential part of algebraic addition-subtraction, multiplication, division, and so forth. In serial arithmetic units, the acceleration of summation is achieved by converting to serial-parallel circuits; in parallel units, by using circuits that use the statistical character of the carries, circuits with “instantaneous carry,” and others. Methods for speeding up multiplication are the most developed. In serial units they are based mostly on the introduction of additional adders that permit the simultaneous summation of several partial products; within limits, the presence of η serial-type adders (or n/2 adders and logic circuits) affords the possibility of performing multiplication in 2n cycles. In parallel arithmetic units, logical and instrumental methods of the first and second order are used to speed up multiplication. The logical methods are based on transformation of the multiplier; the expansion of equipment during its use involves only the local control unit and does not depend on the number of digits in the numbers being multiplied. The theoretical and practical limit of the possibilities of logical methods is the reduction of the average number of summations during one multiplication operation to one-third for each binary digit of the multiplier. Instrumental methods of the first order are based on the introduction of additional adders, on additional carry-save adder circuits, or on replacement of shift circuits with multiplication and division circuits for special multipliers. The amount of additional equipment is proportional to the number of digits; the number of summation cycles in the multiplication process can be reduced, theoretically, to one (independent of the number of digits of the multiplier), but practically this limit is not attained. Instrumental methods of the second order are based on the construction of trees of adders; the amount of equipment is proportional to the square of the number of digits, the multiplication time being two to three summation cycles. Analogous methods have been developed for speeding up the division operation.
The primary trend in arithmetic unit development involves the use of microelectronics. Therefore, array circuits are used for direct summation and multiplication of decimal digits, and full carry look-ahead and parallel-parallel adders and instrumental methods of the second order are used for speeding up multiplication and division—that is, structures having a large number of repeating components and systematic connections between them. New methods of coding numbers have also been developed which simplify the performance of operations as well as new methods of accelerating operations, instrument checking, and correcting errors. In addition, the problems of increasing speed; decreasing overall size, cost, and input power; and increasing reliability have been posed.
REFERENCESRichards, R. K. Arifmeticheskie operatsii na tsifrovykh vychislitel’nykh mashinakh. Moscow, 1957. (Translated from English.)
Khetagurov, la. A. Arifmeticheskie ustroistva vychislitel’nykh mashin diskretnogo deistviia. Moscow, 1961. Kartsev, M. A. Arifmetika tsifrovykh mashin. Moscow, 1969.
M. A. KARTSEV