boundary scan

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boundary scan

The use of scan registers to capture state from device input and output pins. IEEE Standard 1149.1-1990 describes the international standard implementation (sometimes called JTAG after the Joint Test Action Group which began the standardisation work).
References in periodicals archive ?
Several considerations must be kept in mind to ensure design-for-test guidelines are followed during the board design phase to avoid hiccups during boundary scan tests for these boards.
The success of boundary scan in the manufacturing test environment depends largely on the availability of ATPG (Automatic Test Program Generation), which can help test engineers develop and generate the boundary scan tests (Figure 2).
Symphony/TS/DSM uses a software converter to translate boundary scan test vectors (generated using JTAG Technologies' powerful ProVision development software) directly to Teradyne's native test programming language where they can be applied efficiently using Teradyne's digital subsystem and innovative Deep Serial Memory option.
Boundary scan connect test: Boundary scan test for pins not connected to any device and that have testpoints.
Boundary scan test program development can be developed at the early stage of board development where only limited information is available, such as the netlist, bill of materials (BoM) and boundary scan description language (BSDL) of boundary scan devices.
Out of this context the JTAG group began forming a boundary scan test strategy.
With the UCM3070, our customers have the opportunity to use their boundary scan test, generated with our SYSTEM CASCON software, on the Agilent Medalist i3070 Series 5 ICT system.
This measurement ensures the boundary scan test will not fail due to inadequate voltage levels of the boundary scan devices, something that can be hard to diagnose, as the test engineer will not get a straightforward failure message to indicate that a power rail is faulty.
The boundary scan test method provides a means to electrically test the interconnection between two semiconductor devices equipped with boundary scan, and even devices without boundary scan, such as memories (DDR/Flash) and connectors, without the need for a test probe on every device pin.
Boundary scan test access is provided to the digital (TTL) side of the devices using the industry standard IEEE 1149.
The system's flexible architecture allowed Huawei to customize a boundary scan test solution to meet their specific needs.
The best thing about my job is that I get to work on amazing leading-edge manufacturing board test solutions, such as the latest in in-circuit test (ICT), boundary scan test and even innovations like Intel Silicon View Technology.