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CPLD |
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CPLD (Complex PLD) A programmable logic device that is made up of several simple PLDs (SPLDs) with a programmable switching matrix in between the logic blocks. CPLDs typically use EEPROM, flash memory or SRAM to hold the logic design interconnections. See PLD and SPLD.
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No references found | Altera's MAX II CPLD family employs an easy-to-use look-up table (LUT) logic structure that enables higher-density designs at less than half the cost of the previous-generation MAX CPLD family. It also includes a CPLD that serves as an Ethernet/Flash loader for the Multi-Media Reference Design and a graphical user interface (BuildManager) for the Windows CE development environment that makes it easy to interact with the build tree. For example, a second 32 Kb flash memory to enable concurrent ISP and a CPLD to a 5-volt system with a 4MHz MCU clock will increase the power drain by 30. |
CPLD |
CPKE CPKI CPKL CPKN CPKO CPKP CPKT CPKVI CPKW cpl cpl cpl CPL(H) CPL(P) Cpl. Cpl. Cpl. CPL/CPS Cpl1 CPLA cPLA2 CPLAB CPLAN CPLAR CPLB CPLC CPLCMP CPLCO CPLD CPLDZCPLE CPLED CPLEV CPLF CPLFA CPLG CPLH CPLI CPLIA CPLIC CPLip CPLIS CPLL CPLM CPLMR CPLMT CPLN CPLNI CPLO CPLP CPLQ CPLR CPLS | |||||||
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