interface board has 15 single-ended PWM input signals, 16 differential PWM output signals, 4 differential Brake output signals and a differential Inverter Enable output signal.
Xilinx recently announced double digit growth in CPLD
revenues, driven by strong growth in portable consumer applications such as PDAs, smartphones, and MP3 players.
Designers can use Atmel's OEM version of Precision(R) RTL Synthesis and/or ModelSim(R) Simulation environment to design the ATF15xxBE CPLD
With these IP cores, the MAX II family will take CPLD
design into new territory," said Justin Cowling, Altera's director of marketing for Altera's IP business unit.
Find out more about Altera's FPGA, CPLD
and ASIC devices at www.
Xilinx CoolRunner-II CPLDs
offer the lowest power consumption, highest I/O count per macrocell, and smallest packaging in the industry and are cost optimized to address the pricing pressure of products designed for a broad spectrum of applications.
Our customers need complete synthesis, simulation, and verification solutions for both CPLD
and FPGA development flows.
To meet the demands of the battery-powered, portable market place, CPLDs
will need to deliver on four key elements: power, performance, price, and size," said Evert Wolsheimer, Xilinx vice president and general manager of the CPLD
Mobile, full QWERTY keyboard scanner using MAX IIZ CPLD
Now Available to Provide Even Greater Design Flexibility for Automotive, Military and Industrial Applications
designers now have an alternative to less flexible ASSPs, ASICs, and discrete components for many applications.
The POWR1220AT8 device integrates a 48 Macrocell ruggedized CPLD
, dual precision voltage monitoring comparators with an accuracy of 0.