Chip Scale Packaging

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Chip Scale Packaging

(hardware)
(CSP) A type of surface mount integrated circuit packaging that provides pre-speed-sorted, pre-tested and pre-packaged die without requiring special testing. An example is Motorola's Micro SMT packaging.

See also: chip-on-board, flip chip, multichip module, known good die, ball grid array.

["Chip scale packaging gains at SMI. (Surface Mount International)", Bernard Levine, Electronic News (1991), Sept 4, 1995 v41 n2081 p1(2)].
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SAN DIEGO -- Staccato Communications, an Ultra Wideband (UWB) wireless technology pioneer and Certified Wireless USB leader, today unveiled the industry's only Wafer Chip Scale Package (WCSP) based on Staccato's Ripcord[TM] single-chip, all-CMOS solution.
The Ripcord[TM] SC3500 product family is offered in two packaging options, a complete System-In-Package (SiP) which provides a fully-integrated solution for simplified RF design and a high degree of manufacturability, and a Wafer-Level Chip Scale Package (WCSP) which provides a low-cost, small-form-factor option for module manufacturers and OEMs that have in-house RF expertise.
The AD8337 is housed in a tiny 3 mm x 3 mm, 8-lead chip scale package (CSP) that occupies one-third less board area than alternatives.
Our proprietary Chip Scale Package stacking technology allows us to double, triple or quadruple the capacity of DDR1 and DDR2 DRAMs within the JEDEC-standard form factor," said Paul Goodwin, director of business development at Staktek.
Nasdaq:STAK), a major provider of high-density packaged memory stacking solutions, today announced at Denali MemCon San Jose the availability of its High Performance Stakpak(R) for stacking DDR2 and DDR1 DRAMs in Chip Scale Packages.
Pre-production quantities of the High Performance Stakpak are currently available for DDR2 and DDR1 DRAMs in Chip Scale Packages, and production quantities will be available in Q1 CY05.
Table 16: World Recent Past, Current & Future Analysis for Chip Scale Packages by Geographic Region - US, Canada, Japan, Europe, Asia-Pacific (excluding Japan), and Rest of World Markets Independently Analyzed with Annual Revenues in US$ Million for Years 2000 through 2010 (includes corresponding Graph/Chart) II-39
Table 17: World Long-Term Projections for Chip Scale Packages by Geographic Region - US, Canada, Japan, Europe, Asia-Pacific (excluding Japan), and Rest of World Markets Independently Analyzed with Annual Revenues in US$ Million for Years 2011 through 2015 (includes corresponding Graph/Chart) II-40
Table 18: World 10-Year Perspective for Chip Scale Packages by Geographic Region - Percentage Breakdown of Dollar Revenues for US, Canada, Japan, Europe, Asia-Pacific (excluding Japan), and Rest of World Markets for Years 2003, 2008 & 2012 (includes corresponding Graph/Chart) II-41
It supports a wide variety of BGA formats including single devices in boats or trays and strip devices in magazines with the capability to process chip scale packages, plastic ball grid array, ceramic ball grid array, tape grid array, and connector package types.
Tegal has developed a suite of processes for the plasma etch of a variety of metal films incorporated in chip scale packages.
Nasdaq: AMKR) announced today that it is the first to qualify a family of two die Stacked Chip Scale Packages (S-CSP) to meet 1.