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Column Address Strobe

   Also found in: Acronyms 0.04 sec.
(hardware)Column Address Strobe - (CAS) A signal sent from a processor (or memory controller) to a dynamic random-access memory (DRAM) (qv) circuit to indicate that the column address lines are valid.


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Mitsubishi's 256-Mbit DDR SDRAM is available in 64-megaword x 4-bit (64M x 4) and 32M x 8 configurations (M2S56D20TP and M2S56D30TP, respectively), and supports column address strobe latencies (CL) of CL 1.
Mitsubishi Samples 0.18-um, 256-Mbit PC266 DDR and PC133 SDRAMs That ... by Business Wire
5-ns clock cycle operation supports a Column Address Strobe (CAS) Latency of 3.
Mitsubishi Electronics Samples 64- and 128-Mbit PC133 SDRAMs for ... by Business Wire
25-micron CMOS process technology, Mitsubishi's JEDEC-standard 64-Mb DDR SDRAM supports column address strobe latencies (CL) as stringent as CL 1.
Mitsubishi Samples JEDEC-Standard, 0.25-Micron, 64-Megabit DDR SDRAM ... by Business Wire
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