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Column Address Strobe |
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Mitsubishi's 256-Mbit DDR SDRAM is available in 64-megaword x 4-bit (64M x 4) and 32M x 8 configurations (M2S56D20TP and M2S56D30TP, respectively), and supports column address strobe latencies (CL) of CL 1. 5-ns clock cycle operation supports a Column Address Strobe (CAS) Latency of 3. 25-micron CMOS process technology, Mitsubishi's JEDEC-standard 64-Mb DDR SDRAM supports column address strobe latencies (CL) as stringent as CL 1. |
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