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cyclic redundancy check |
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cyclic redundancy check [′sīk·lik ri′dən·dən·sē ‚chek] (computer science) A block check character in which each bit is calculated by adding the first bit of a specified byte to the second bit of the next byte, and so forth, spiraling through the block.
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The Core supports all required PCI Express protocol features of all three layers and implements many non-required features, such as End to End Cyclic Redundancy Checks (ECRC), Advanced Error Reporting (AER), hotplug support, variable payload size, and a choice of 1 - 8 virtual channels. Furthermore, it provides optional end-to-end cyclic redundancy checks (ECRC) to support the applications that require guaranteed data integrity while it moves from source to destination. Furthermore, it provides optional end-to-end cyclic redundancy checks (ECRC) to support the applications that require guaranteed data integrity while it moves from source to destination. |
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