field-effect transistor(redirected from Depletion mode transistor)
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field-effect transistor:see transistortransistor,
three-terminal, solid-state electronic device used for amplification and switching. It is the solid-state analog to the triode electron tube; the transistor has replaced the electron tube for virtually all common applications.
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(FET), a semiconductor device in which the current is varied by the action of an electric field that is perpendicular to the current and is generated by the input signal. The operating current in FET is transported by charge carriers of only one sign (electrons or holes); therefore such devices are called unipolar, in contrast to bipolar transistors.
Field-effect transistors are arbitrarily divided into two groups, depending on their physical structure and mechanism of operation. The first group consists of transistors in which a p-n junction or a metal-semiconductor junction, called a Schottky barrier, controls the current; the second consists of transistors in which an insulated electrode, or gate, controls the current, and those in this group are called MIS (metal-insulator-semiconductor) transistors. The dielectric used in the latter may be silicon dioxide (MOS transistor) or a laminar structure such as SiO2-Al2O3 (MAOS transistor) or SiO2-Si3N4 (MNOS transistor). The insulated gate FET’s also include those with a “floating” gate and those in which a charge is stored in the insulated gate; they are used as electronic memory elements. The semiconductors used in FET’s are mainly Si and GaAs, and the metals for forming junctions are Al, Mo, and Au. FET’s were developed in the 1950’s to 1970’s, based on the work of the American scientists W. Shockley, C. A. Mead, D. Kang, and M. Atalla.
In the first group of FET’s (Figure 1, a and b) the control element (gate) is a semiconductor or metal electrode that forms a p-n or metal-semiconductor junction with the semiconductor in the channel region. A voltage is supplied to the gate that reduces the current flowing from the source to the drain. When this voltage is increased, the space-charge region of the junction, which is depleted by the charge carriers, spreads into the channel region and reduces the conducting cross section of the channel. At a certain value of the gate voltage, called the pinch-off voltage Upo, the current in the device is cut off.
In insulated-gate FET’s (Figure 1,c) the metal control electrode is separated from the channel region by a dielectric layer 0.05-0.20 microns thick. The channel may be formed by a technological process (embedded channel) or by the voltage supplied to the gate in the operating mode (induced channel). Accordingly, a device will have a transfer characteristic of type I or type II (Figure 1,c).
FET’s are used extensively in electronic apparatus for power and voltage amplification of electrical signals. They are the solid-state analogues of electron tubes and are described by an analogous system of parameters—transconductance (0.1 to 400 milliamperes per volt), pinch-off voltage (0.5 to 20 volts), and DC input resistance (1011 to 1016 ohms).
FET’s using a p-n control junction have the lowest noise level (mainly of thermal noise) among semiconductor devices over a wide frequency range, from infralow to superhigh frequencies (SHF): the noise factor of the best transistors is less than 0.1 decibel (dB) at a frequency of 10 hertz (Hz) and about 2 dB at a frequency of 400 megahertz (MHz). This type of transistor can dissipate up to several tens of watts. The main drawback of such transistors is the relatively high transfer capacitance, which must be neutralized for high amplification. FET’s using a metal-semiconductor junction achieve the highest operating frequencies. The maximum frequency with power amplification of the gallium arsenide FET’s exceeds 40 gigahertz (GHz). Insulated-gate FET’s have a high DC input resistance (up to 1016 ohms, which is two to three orders of magnitude higher than other FET’s and is comparable to the input resistance of the best electrometer tubes). In the SHF region the amplification and noise level of these FET’s are the same as for bipolar transistors (the limiting frequency for power amplification is about 10 GHz, the noise factor at 2 GHz is about 3.5 dB, and the dynamic range is more than 100 dB), but their discrimination and noise immunity are better because of their strictly quadratic transfer characteristic. The relative simplicity of fabrication (using planar technology) and the circuit features of their structure make possible the use of FET’s in large-scale integrated circuits (LSI circuits) of computer devices—for example, LSI circuits have been developed that contain more then 10,000 MIS transistors in one crystal.
REFERENCESMalin, B. V., and M. S. Sonin. Parametry i svoistva polevykh tranzistorov. Moscow, 1967.
Polevye tranzistory. Moscow, 1971. (Translated from English.)
Sze, S. M. Fizika poluprovodnikovykh priborov. Moscow, 1973. (Translated from English.)
V. K. NEVEZHIN and O. V. SOPOV