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cache coherency |
Also found in: Wikipedia | 0.01 sec. |
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cache coherency Managing a cache so that data are not lost or overwritten. For example, when data are updated in a cache, but not yet transferred to its target memory or disk, the chance of corruption is greater. Cache coherency is obtained by well-designed algorithms that keep track of the cache. It is even more critical in symmetric multiprocessing (SMP) where memory is shared by multiple processors. See cache and SMP.
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