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Emitter Coupled Logic

   Also found in: Wikipedia 0.01 sec.
Emitter Coupled Logic - (ECL) (Or "Current Mode Logic") A technology for building logic gates where the emitter of a transistor is used as the output rather than its collector. ECL has a propagation time of 0.5 - 2 ns (faster than TTL) and a power dissipation 3 - 10 times higher than TTL.


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It has two differential, frequency-programmable low-voltage positive emitter coupled logic (LVPECL) reference inputs and one differential synchronous input.
Semtech Adds Jitter Attenuating and Multiplying PLL Devices for ... by Business Wire
A pioneer of Positive Emitter Coupled Logic (PECL) signaling, ON Semiconductor's latest family of PLL ICs offers performance compatible to the most widely used crystal oscillators at a fraction of the cost.
ON Semiconductor Introduces PLL Clock Generation IC with Superior ... by Business Wire
The global leader in high-speed differential signaling, ON Semiconductor (NASDAQ: ONNN) today released three ECLinPS MAX(TM) devices -- the first members of a new family of Emitter Coupled Logic (ECL) devices targeted at OC-48 grade applications such as routers, switches, and 3G base stations where jitter management is a particularly critical issue in overall system performance.
ON Semiconductor Introduces ECLinPS MAX Clock and Data Management ICs ... by Business Wire
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