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Emitter Coupled Logic

   Also found in: Wikipedia 0.01 sec.
Emitter Coupled Logic - (ECL) (Or "Current Mode Logic") A technology for building logic gates where the emitter of a transistor is used as the output rather than its collector. ECL has a propagation time of 0.5 - 2 ns (faster than TTL) and a power dissipation 3 - 10 times higher than TTL.


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The new high precision devices provide total frequency stability of O50 parts per million (ppm) and will meet clock generation requirements in next generation low-voltage differential signaling (LVDS) and low-voltage positive emitter coupled logic (LVPECL) designs.
It has two differential, frequency-programmable low-voltage positive emitter coupled logic (LVPECL) reference inputs and one differential synchronous input.
5 pattern at Low Voltage Differential Signal (LVDS) or Emitter Coupled Logic (ECL) levels.
 
 
 
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