propagation delay

(redirected from Gate delay)

propagation delay

[‚präp·ə′gā·shən di‚lā]
(electronics)
The time required for a signal to pass through a given complete operating circuit; it is generally of the order of nanoseconds, and is of extreme importance in computer circuits.

propagation delay

The time it takes to transmit a signal from one place to another. Propagation delay is dependent solely on distance and two thirds the speed of light. Signals going through a wire or fiber generally travel at two thirds the speed of light. Contrast with nodal processing delay.
References in periodicals archive ?
The propagation delay or gate delay is the length of time which starts when the input to a logic gate becomes stable and valid to change, to the time that the output of that logic gate is stable and valid to change.
Among specific topics are a new algorithm for post-silicon clock measurement and tuning, a schematic-based extraction methodology for dislocation defects in analog/mixed-signal devices, modeling gate delay faults by means of transition delay faults, and predicting pixel defect rates based on image sensor parameters.
The typical gate delay used for recording the calibration curve was chosen from the experimental condition that gave the best signal-to-noise and signal-to-background ratio.
This process delivers a 100 Ps gate delay for a 2 input NAND gate with a fan out of two.
Standard cell libraries containing more than 1000 cells feature 11ps gate delay and a library density of more than 400,000 gates per mm2.
Infineon designed several key functional building blocks for high-speed communications, based on its state of the art SiGe:C bipolar technology, which reaches a cut-off frequency of more than 200GHz and has a demonstrated record ring oscillator gate delay time of 3.
The architecture means that the limiting factor on speed is power consumption, not gate delay, and Bailey argues that constrained logic areas will run much faster.
2 micron CMOS QYH400 "The Time to Market Gate Array" family offers the convenience and turnaround of an FPGA, but with both the performance (typical NAND gate delay of 0.
2ps ring-oscillator gate delay with other key circuit blocks substantially exceeding the highest previously reported performance of silicon based integrated circuits.