HDL


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HDL

(biochemistry)

HDL

HDL

(Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. The first book to provide side-by-side examples of subsets of both languages that could be simulated and synthesized was "HDL Chip Design" by Douglas J. Smith, published by Doone Publications, ISBN 0-9651934-3-8. See Verilog and VHDL.


HDL Languages
VHDL and Verilog are the most popular HDLs. These examples show a circuit described in RTL in both languages and the resulting schematic of the gate level netlist created after synthesis (below). (Language and schematic examples from "HDL Chip Design" courtesy of Douglas J. Smith.)








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using all components) rather than relying on signal generated by 1 component that can vary highly among HDL species (lipid).
It was designed to assess the efficacy of elevating HDL cholesterol and lowering levels of non-HDL cholesterol with gemfibrozil in reducing the risk of CHD in 4,081 men with primary dyslipidemia.
HDL Verifier provides co-simulation interfaces that link MATLAB and Simulink with Cadence Incisive, Mentor Graphics ModelSim, and Questa HDL simulators.
You'll lose excess weight, raise your HDL, and lower your risk of diabetes, heart disease, high blood pressure, and possibly cancer.
You can think of HDL (high-density lipoproteins) as the cholesterol that's being ferried out of your arteries.
As a result, designers can leverage the existing library of Verilog HDL models as they work on designs using IEEE 1076 standard VHDL, which is the increasingly popular hardware description language of the two.
Several factors other than weight loss -- including increased muscle mass, weekly running mileage, current weight and calorie intake -- did not correlate with HDL levels among the joggers, the researchers report in the recently released May INTERNATIONAL JOURNAL OF OBESITY.
SVE co-simulates EDIF netlist blocks with HDL RTL blocks that allow use of legacy modules with Stratix III devices.
On average, women in the United States have higher HDL levels than men -- which may help explain women's lower rate of heart disease.
First graph, first sentence of release should read: The MathWorks today announced that Simulink[R] HDL Coder has won a New Product Forum Award at GSPx 2006, the International Signal Processing Conference and Expo that took place last week in Santa Clara, Calif.