Instruction Set Processor


Also found in: Acronyms.

Instruction Set Processor

(language)
(ISP) A family of languages for describing the instruction sets of computers.

["Computer Structures: Readings and Examples", D.P. Siewiorek et al, McGraw-Hill 1982].
References in periodicals archive ?
Nohl of CoWare will talk about how designers can increase programmability while minimizing power consumption through application-specific instruction set processors (ASIPs)-- also called algorithmic engines.
While in the CoWare booth, customers can learn more about a new book available from Kluwer Academic Publishers, entitled Design of Energy-Efficient Application-Specific Instruction Set Processors.
These emerging design tools represent a significant paradigm shift, allowing a whole new breed of users to participate in architecture exploration and design of Application Specific Instruction set Processors (ASIP).
Leveraging its innovative ISiS(TM) Platform and proprietary Matched Instruction Set Processors (MISPs(TM)), Ellipsis delivers complete, fully optimized solutions with the lowest gate count, dramatically reduced power consumption, extended operational range and superior performance.
Rowen says the industry will move away from standard, fixed instruction set processors in favor of configurable and extensible CPU approaches.
This impetus will drive the industry away from standard, fixed instruction set processors and traditional sea-of-gates ASIC approaches.

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