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pipelining
(redirected from Instruction pipeline)

    Also found in: Wikipedia 0.06 sec.
pipelining - pipeline


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The APU controller provides a flexible high-bandwidth interface between the reconfigurable logic in the FPGA fabric and the instruction pipeline of the integrated IBM PowerPC(TM) 405 CPU.
Poseidon Design Systems' Virtex-4 PowerPC Accelerator Has Been ... by Business Wire
In a pioneering move to maximize clock utilization, the MAXQ does not implement an instruction pipeline to support its 1-cycle operation.
New MAXQ Microcontroller Architecture Provides Ultra-Quiet ... by Business Wire
The CPU uses a three-stage instruction pipeline that allows execution of up to one instruction per clock cycle, or up to 25 million instructions per second (MIPS) at a clock rate of 25 MHz.
National Semiconductor's 16-bit RISC Microcontroller Features ... by Business Wire
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