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interrupt latency |
Also found in: Wikipedia | 0.01 sec. |
interrupt latencyThe time it takes to service an interrupt. It becomes a critical factor when servicing real-time functions such as a communications line. See UART overrun. How to thank TFD for its existence? Tell a friend about us, add a link to this page, add the site to iGoogle, or visit webmaster's page for free fun content. |
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| Occupying less than 8 kbytes of memory (in a minimal configuration), OSEck delivers fully-preemptive, event-driven real-time response with a context switching speed of 150 nsec and a worst-case interrupt latency of 300 nsec (assuming 850-MHz clock frequency). Full interrupt support is provided, and zero interrupt latency time is a key benefit. FSMLabs' patented hard real-time technology provides spectacular real-time performance on a wide range of processors: 2 microsecond worst-case interrupt latency on an AMD Opteron running both RTLinux and MS Windows XP (under VMWare), and 20 microsecond latency on an ARM9 running a full GSM/GPRS/EDGE stack. |
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