interrupt priority level

Also found in: Acronyms, Wikipedia

0.01 sec.

interrupt priority level - The Motorola 68000 family of processors can be at an interrupt priority level from 0 (no interrupt in progress) up to 7. While the processor is handling an interrupt at one level, it will ignore other interrupts at that level or lower.

Want to thank TFD for its existence? Tell a friend about us, add a link to this page, add the site to iGoogle, or visit the webmaster's page for free fun content.

?Page tools

Printer friendly
Cite / link

Feedback

Mentioned in	?		References in periodicals archive	?		Encyclopedia browser	?		Full browser	?
No references found			In addition to the 24-bit sigma-delta ADCs and ARM7 core with eight interrupt priority levels, the new precision analog microcontrollers incorporate 32 Kbytes of flash memory and 4 Kbytes of SRAM, a programmable gain amplifier, multiplexers, buffers, an auxiliary 24-bit ADC for cold junction compensation and interfacing to thermocouple applications, and SPI (serial peripheral interface), UART (universal asynchronous receivers-transmitters) and I2C ports. Analog Devices Pairs 24-Bit Sigma-Delta ADCs with ARM7(TM) Core for ... by Business Wire			interpupillary diameter interquartile range interradial canal interradius interray interrecord gap Interregional Economic Relations interregnum interrenal interrogate Interrogation interrogation point interrogation suppressed time delay interrogator interrogator-responsor interrogator-transmitter Interrow Crops Interrow Tillage interrupt interrupt handler interrupt latency interrupt list interrupt mask interrupt mode interrupt priorities interrupt priority level interrupt request interrupt routine interrupt signal Interrupt System interrupt trap interrupt vector interrupt-driven interrupt-driven system interrupted acoustical ceiling interrupted aging interrupted arch interrupted arch molding interrupted continuous wave interrupted current interrupted dc tachometer interrupted fire interrupted foundation interrupted gene interrupted mating interrupted quenching interrupted quick flashing light interrupted screw interrupted shear wall interrupter interrupter gear			Interrupt Disable Command Register Interrupt Dispatch Time Interrupt Enable Input Interrupt Enable Register Interrupt Flag Interrupt Flag Register Interrupt handler Interrupt If Overflow Occurs Interrupt latency Interrupt Level Mask Interrupt Level Mask Register interrupt list Interrupt mask Interrupt mask Interrupt mask Interrupt mask register Interrupt mask register Interrupt Mask Register 1 Interrupt Mask Register 3 Interrupt Mode Interrupt Mode Interrupt Modified Vector Register Interrupt Pending Register B Interrupt Pending Register High Interrupt Pending Register Low Interrupt Polarity Control Register interrupt priorities Interrupt Priority 1 interrupt priority level Interrupt Priority Register Interrupt Process Interrupt Processor, Order Pizza Interrupt request Interrupt request Interrupt request Interrupt Request Level Interrupt Request Line Interrupt request register Interrupt request register Interrupt Request Register 1 Interrupt Return interrupt routine Interrupt routines Interrupt Service Register Interrupt service routine Interrupt service routine Interrupt Service Time interrupt signal Interrupt Status Interrupt Status Port Interrupt Status Queue Interrupt Status Register 0 Interrupt Status Register 1 Interrupt Storage Area interrupt system interrupt trap Interrupt Unit

Encyclopedia

Free Tools:	For surfers: Free toolbar & extensions \| Word of the Day \| Help For webmasters: Free content \| Linking \| Lookup box \| Double-click lookup

Disclaimer
All content on this website, including dictionary, thesaurus, literature, geography, and other reference data is for informational purposes only. This information should not be considered complete, up to date, and is not intended to be used in place of a visit, consultation, or advice of a legal, medical, or any other professional.