MT/sec

(redirected from Megatransfers)

MT/sec

(MegaTransfers per SECond) A measurement of bus and channel speed in millions of "effective" cycles per second. Also written as "MT/s," it is a rating of the actual, delivered speed rather than the frequency of the clock. For example, if timing is derived from both the rising and falling edges of the cycle rather than one complete cycle, a 400 MHz clock yields 800 MT/sec.

Gigatransfers
For "gigatransfers," substitute the M with a G (GT/sec, GT/s). For example, at a double data rate, an 800 MHz clock yields 1.6 GT/sec.
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Multiple density options available in 512 megabit (Mb) to 2Gb components in X4/X8/X16 packages -- High-capacity module configurations ranging from 1GB to 4GB UDIMMS and SODIMMS -- Up to 800 megatransfers per second (MT/s) providing a migration path for higher bus speeds -- Supporting 1.
2) Megatransfers (MT) per second refer to the number of data transfers (or data samples) captured per second, with each sample occurring at the clock edge.
Fast SCSI (up to 10 Megatransfers per second, which is 10MB/sec for narrow SCSI or 20MB/sec for wide SCSI) is defined in the SCSI-2 specifications.
The solution demonstrates operation in working silicon at a data rate of 1866 megatransfers per second (MT/s) in a low-cost wire bond package.
The industry's lowest-power DDR3 LRDIMM memory buffer and the first capable of operating with transfer speeds up to 1866 megatransfers per second (MT/s).
IDT([R])) (NASDAQ: IDTI), the Analog and Digital Company[TM] delivering essential mixed-signal semiconductor solutions, today announced the introduction of the industry's first low-power DDR3 memory buffer capable of operating with transfer speeds up to 1866 megatransfers per second (MT/s).
The solution is the first to demonstrate operation in working silicon at a data rate of 1866 megatransfers per second (MT/s) in a low-cost wire bond package.
The solutions is the first to demonstrate operation in working silicon at a data rate of 1866 megatransfers per second (MT/s) in a low-cost wire bond package.
Rambus' DDR3 solution is the first to demonstrate operation in working silicon at a data rate of 1866 megatransfers per second (MT/s) in a low-cost wire bond package.
DDR3 PHY for consumer electronics: The world's first high-performance DDR3 interface solution implemented in a low-cost wire bond package performing memory transactions to and from a DDR3 SDRAM device operating at 1866 megatransfers per second (MT/s) with architectural support for data rates of up to 2133MT/s.
Additionally, Micron's DDR3 products support data rates of 800 megatransfers per second (MT/s) to 1,066 MT/s with clock frequencies of 400 megahertz (MHz) to 533 MHz respectively, doubling the speed from DDR2.
The FuturePlus FS2350 analysis probe, designed for use with Agilent logic analysis systems, provides state analysis and protocol decode at up to 1066 megatransfers per second (MT/s), as well as timing analysis at up to 4 GHz in systems with typical data valid windows as narrow as 650 ps.