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The enhancements include an expanded memory management unit that is now capable of managing pages from 1KB to 256MB, improved control of caches and increased co-processor support.
The first chip to result from the alliance, the L7200, includes an ARM 720T processor core with 8Kbyte cache, write buffer and memory management unit, along with several integrated AMBA (Advanced Microcontroller Bus Architecture) peripherals.
To extend this capability across the complete SoC, the new CoreLink MMU-400 Memory Management Unit provides hardware accelerated memory translation for other virtualized masters.
A5 CPU core has a 64-bit internal bus with a high performance memory architecture including cache memory and the on-chip memory management unit.
The on-chip Memory Management Unit (MMU) incorporates hardware firewalls to isolate and protect applet code from other system elements.
The ARM926EJ-S soft macrocell is a fully synthesizable, high-performance 32-bit RISC processor comprising the Jazelle technology-enhanced processor core, instruction and data caches, tightly coupled memory (TCM) interfaces, memory management unit (MMU), and separate instruction and data AMBA bus-based AHB (Advanced High-performance Bus) interfaces.
Features of the 4Kc hard core include 16K instruction and data caches, a TLB memory management unit and a die size of less than 7sq/mm when using TSMC's 0.
The CX92135 is based on a high-performance ARM 32-bit core with an integrated memory management unit (MMU) that delivers the processing power required for high-speed imaging applications.
The new SoC contains a high-performance ARM 32-bit core with an integrated memory management unit (MMU) that delivers the processing power required for high-speed imaging applications.
The range offers both a contact and a contactless interface on a single chip as well as the company's smart card hardware firewall, with a memory management unit implemented on-chip, to allow secure separation of different applications from one another.
Shown at both the Solarflare and AMD (#1408) booth, the Direct Path demonstration will show near-native network performance for virtualized 10GbE using VMware DirectPath technology with Solarstorm server adapters and AMD's I/O memory management unit (IOMMU).
Deos utilizes a processor's memory management unit to build a firewall between the kernel and user tasks, thereby preventing errant or malicious code from corrupting other user tasks and the kernel.