The SH7615 processor's hybrid RISC DSP has an extended Harvard Architecture which simultaneously accesses two data and one address bus and also can sustain a multiply-accumulate function in a single-clock cycle.
But application developers who wish to use the extended registers, memory management, and new instructions, such as the combined a*b+c=d multiply-accumulate floating point instruction, will have to start porting.
The Cortex-M4 processor features extended single-cycle multiply-accumulate (MAC) instructions, optimized SIMD arithmetic, saturating arithmetic instructions and an optional single precision Floating Point Unit (FPU).
Programming support for the RTAX4000D four-million gate radiation-tolerant spaceflight DSP device, which adds embedded radiation-tolerant multiply-accumulate blocks to the tried-and-trusted industry-standard RTAX-S product family
During the course of the project, Forte implemented a floating-point multiply-accumulate algorithm to allow the design team to meet performance goals that required two-cycle floating-point multiply-accumulate operations at 266 MHz clock rate.
RTAX-DSP FPGAs offer up to 15 billion multiply-accumulates per second at densities of up to 4 million equivalent system gates and 840 user I/Os for space-based applications, and include embedded radiation-tolerant multiply-accumulate blocks (mathblocks) to the tried-and-trusted industry-standard RTAX-S architecture.
Microchip's new DSP Library enables these capabilities by taking advantage of the highly optimized hardware features inside the PIC32 MCU, including its multiply-accumulate, math unit with parallel execution, and two full sets of CPU registers.