PCI bridge definition of PCI bridge in the Free Online Encyclopedia.

peripheral component interconnect [pə‚rif·ə·rəl kəm‚pō·nənt ′in·tər·‚kə·nek]

(computer science)

A bus standard for connecting additional input/output devices (such as graphics or modem cards) to a personal computer. Abbreviated PCI.

(hardware)

Peripheral Component Interconnect - (PCI) A standard for connecting peripherals to a personal computer, designed by Intel and released around Autumn 1993. PCI is supported by most major manufacturers including Apple Computer. It is technically far superior to VESA's local bus. It runs at 20 - 33 MHz and carries 32 bits at a time over a 124-pin connector or 64 bits over a 188-pin connector. An address is sent in one cycle followed by one word of data (or several in burst mode).

PCI is used in systems based on Pentium, Pentium Pro, AMD 5x86, AMD K5 and AMD K6 processors, in some DEC Alpha and PowerPC systems, and probably Cyrix 586 and Cyrix 686 systems. However, it is processor independent and so can work with other processor architectures as well.

Technically, PCI is not a bus but a bridge or mezzanine. It includes buffers to decouple the CPU from relatively slow peripherals and allow them to operate asynchronously.

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No references found	When the PCIe to PCI bridge was originally envisioned, it was in a forward-mode application--that is, for bridging a PCIe root complex to one or more PCI (or PCI-X) bus(es). New PCIe bridge-based riser cards allow connection to PCI-X cards by Moore, Steve / Computer Technology Review All three of the processor subcircuits are linked by a 66 MHz local PCI bus to a pair of PCI bridge devices, one for the local on-card disk and LAN I/O, and one for the 33 MHz system level PCI bus that spans multiple card slots in the chassis Floor planning should begin with the most challenging subcircuit timing condition, in this case a 200-plus MHz L2 bus interface between the MP750 microprocessor and an array of two 512 K static rams. Timing driven floor planning: how to minimize interconnect delays, ... by Voss, Bernard / Printed Circuit Design & Manufacture QuickLogic is the only IC vendor to offer PCI bridge products with on-chip FPGAs. Programmable single chip master/target PCI bridge solution by EDP Weekly's IT Monitor	PC-NFS PC-RT PC-Scheme PC-TALK III PC-TILES PC-to-host PC-to-TV PC-ware PC/104 PC/TV PC100 PC133 PC200 PC66 PCA pcAnywhere PCAV PCB PCCTS PCDATA pcf Pchelovodstvo Pchevzha Pchilka, Olena PCI PCI bridge PCI bus PCI card PCI Configuration Utility PCI DSS PCI Express PCI Mezzanine Card PCI slot PCI steering PCI-ISA Passive Backplane PCI-SIG PCI-X PCIset PCjr PCL PCLIPS PCM PCMCIA PCMIA PCMS PCN PCNB PCP PCR PCradio PCRAM	PCHJ PCHL PCHM PCHMC PCHN PCHO PCHP PCHPAC PCHPI PCHR PCHRA PCHRD PCHRG PCHRS PCHS PCHSAA PCHSG PCHT PCHU PCI PCI PCI PCI PCI PCI PCI (bus) PCI (disambiguation) PCI (disambiguation) PCI (disambiguation) PCI AGP Controller PCI bridge PCI bus PCI card PCI compliance PCI compliant PCI Configuration Utility PCI Conventional PCI DSS PCI DSS Pci Expander Bridge PCI Express PCI Express PCI Express Extensions for Instrumentation PCI Express Graphics PCI Extensions for Instrumentation PCI Host Bridge PCI Hot Plug PCI Industrial Computer Manufacturers Group PCI Industrial Computers Manufacturers Group PCI ISA IDE Accelerator PCI mezzanine card PCI Mezzanine Remote Management Card PCI PED PCI PED PCI PED PCI slot PCI steering PCI Telecom Mezzanine Card PCI to PCMCIA Enhanced IDE Controller

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When the PCIe to PCI bridge was originally envisioned, it was in a forward-mode application--that is, for bridging a PCIe root complex to one or more PCI (or PCI-X) bus(es).

New PCIe bridge-based riser cards allow connection to PCI-X cards by Moore, Steve / Computer Technology Review

All three of the processor subcircuits are linked by a 66 MHz local PCI bus to a pair of PCI bridge devices, one for the local on-card disk and LAN I/O, and one for the 33 MHz system level PCI bus that spans multiple card slots in the chassis Floor planning should begin with the most challenging subcircuit timing condition, in this case a 200-plus MHz L2 bus interface between the MP750 microprocessor and an array of two 512 K static rams.

Timing driven floor planning: how to minimize interconnect delays, ... by Voss, Bernard / Printed Circuit Design & Manufacture

QuickLogic is the only IC vendor to offer PCI bridge products with on-chip FPGAs.

Programmable single chip master/target PCI bridge solution by EDP Weekly's IT Monitor

peripheral component interconnect (redirected from PCI bridge)

peripheral component interconnect
(redirected from PCI bridge)