PCI bus


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The PCI bus was designed for high-speed, efficient data movement using the local bus architecture--directly interfacing with the computer's central processing unit (CPU).
This makes it possible to connect the microprocessor to a PCI bus, the type of general purpose bus commonly used in PCs.
The bridge's forward bridging, utilized in the PEX-8111-Bt878 reference platform, enables smooth migration from PCI to PCIe, while its reverse-bridging feature allows a host processor to reside on the PCI bus, preserving designer's legacy hardware and software architectures.
For some, the PCI bus has been a weak link and PCI Express will alleviate their issues with bandwidth and robustness.
In addition, the PCI bus initialization process must frequently be slowed down to allow enough time for an SRAM-based FPGA to be loaded and enumerated.
Sealevel Systems, founded in 1986, provides communications and I/O solutions for multiple platforms including PCI Bus, ISA Bus, Ethernet serial servers, USB serial adapters, PCMCIA cards, and PC/104 modules.
The PLX GigaBridge Switched PCI architecture enables PCI-based telecommunications, data communications and embedded systems to incorporate 224 PCI bus segments, aggregate tens of gigabits per second, and connect two adjacent PCI devices up to 15 feet away, via a high-performance link.
Our customers see that the under-performance of the PCI bus is now starting to impact the performance of telecommunications applications, and PCI Express addresses this.
Designed for the PCI bus, the DT3162 frame grabber can process significant amounts of data from 120 Mbytes/sec to 133 Mbytes quickly and effectively without CPU intervention.
Even in its slowest configuration, InfiniBand's throughput is on par with the fastest PCI bus, SCSI, Gigabit Ethernet, and Fibre Channel technology.
The PCI-RTA board performs its read/write operations and returns results directly to the PCI bus without tying up the PC's CPU.
The Hurricane Board can be configured to work in the following modes: system master, PCI bus master and PCI bus target.