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phase-locked loop
(redirected from Phase locked loop)

   Also found in: Wikipedia 0.01 sec.
phase-locked loop [′fāz ¦läkt ′lüp]
(electronics)
A circuit that consists essentially of a phase detector which compares the frequency of a voltage-controlled oscillator with that of an incoming carrier signal or reference-frequency generator; the output of the phase detector, after passing through a loop filter, is fed back to the voltage-controlled oscillator to keep it exactly in phase with the incoming or reference frequency. Abbreviated PLL.


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9781596933835 Design methodology for RF CMOS phase locked loops.
A timing card accepts references from multiple sources, selects one, cleans it from phase noise with a digital phase locked loop (DPLL), and distributes it to the line cards via the backplane.
a privately held USA manufacturer of Voltage Controlled Oscillators (VCOs) and highly integrated signal source solutions, including compact Phase Locked Loop (PLL) modules.
 
 
 
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