RISC


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RISC

[risk]

RISC

RISC

(Reduced Instruction Set Computer) A computer architecture that reduces chip complexity by using simpler instructions. The most widely used RISC microprocessors are the ARM chips found in every smartphone and tablet (see ARM chips).

In order to perform the more comprehensive instructions found in the traditional CISC computers (complex instruction set computers), such as Intel's ubiquitous x86 line, RISC compilers have to generate software routines to perform the equivalent processing.

RISC and CISC All Over the Place
RISC designs date back to the 1960s; however, commercial RISC CPUs became popular with chips from companies such as MIPS and Sun in the late 1980s. When first introduced, RISC CPUs were typically faster than their CISC competitors; however, advancements in CISC technology over the years narrowed the performance differences. For example, Intel's CISC-based x86 architecture, which debuted in the early 1980s, grew exponentially due to ever expanding personal Windows usage. Even the RISC-based PowerPC chips used in Apple computers for more than a decade gave way to CISC-based Intel chips in 2006 (see Mactel). However, due to the low power consumption of RISC chips, smartphones and tablets are almost entirely RISC based (see ARM chips).


No Microcode Conversion
RISC processors execute faster because they have no microcode conversion layer, thus eliminating translation overhead. RISC keeps instruction size constant and bans the indirect addressing mode, retaining only those instructions that can be overlapped and made to execute in one machine cycle or less. However, RISC compilers must generate more instructions than CISC compilers. See microcode, indirect addressing and compiler.
References in periodicals archive ?
ARM's versatile RISC technology meets that need, and will spearhead Samsung's strategic thrust into these emerging markets.
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This opportunity with MIPS allows me to concentrate on RISC microprocessor technology and join in bringing about the next generation of personal computers.
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The Macintosh on RISC SDK is an MPW(R)-based (Macintosh Programmer's Workshop) environment that runs on a 68020, 68030 or 68040 Macintosh and generates native code for Macintosh with PowerPC microprocessor-based systems.
The TAEC TX49 RISC CPU core based ASSPs running SpectraWorks will be demonstrated January 5th - 8th at the 2006 Consumer Electronics Show (CES) in Las Vegas, Nevada.
Whiteside joined IBM in 1982 and in 1984 became manager of RT RISC design.
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MIPS RISC and Windows NT provide an excellent opportunity for PC manufacturers to offer hardware design innovation and product differentiation," said S.