Single Instruction Multiple Data


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Single Instruction Multiple Data

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CEVA-X1620 Features * 16-bit Fixed-Point Dual MAC CEVA-X architecture * Unique mix of Very Long Instruction Word (VLIW) and Single Instruction Multiple Data (SIMD) * High frequency -- up to 450 Mhz @ 0.
The VR5432 also contains six independent execution units, including two unified integer/floating-point units, a non blocking load/store unit, a high-performance 32x32 multiply-accumulate unit, a vector unit supporting 8x8 single instruction multiple data (SIMD) operations and a branch unit.
The CW4512 ViSP is built on a 32-bit fixed point system on a chip (SoC) that includes eight parallel single instruction multiple data (SIMD) DSPs integrated with a fast RISC serial processor.
The CW4512 ViSP is built on a 32-bit fixed-point system-on-a-chip (SoC) that includes eight parallel single instruction multiple data (SIMD) DSPs integrated with a fast RISC serial processor.
The 64-bit Single Instruction Multiple Data (SIMD) architecture gives a performance boost to many applications including motion video, telephony, conferencing, 2D graphics, and 3D graphics.
Once completed, the high performance system will consist of a dual processor 2,048 million byte CRAY-3 and a 512,000 single bit processor Single Instruction Multiple Data (SIMD) array with a 128 million byte memory.
It uses an advanced image transform processor (ITP) consisting of a ten-element, single instruction multiple data (SIMD) signal/image processor, combined with an enhanced 32-bit reduced instruction set computer (RISC) processor.
It is innovative because it is built on a new 32-bit fixed-point processor architecture comprising an innovative single instruction multiple data (SIMD)/Vector DSP and a RISC microprocessor.

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