single-event upset

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single-event upset

[¦siŋ·gəl i¦vent ′əp‚set]
(electronics)
A change in the state of a logic device from 0 to 1 or vice versa, as the result of the passage of a single cosmic ray.
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Built using Peregrine Semiconductor's Ultra Thin Silicon (UTSi(R)) Silicon-On-Sapphire (SOS) process, the PE9301 is expected to easily attain 300Krad(Si) total dose tolerance, is immune to any latch-up (well known for Silicon-On-Insulator (SOI) technologies) and will show impressive Single Event Upset (SEU) tolerances (SEU[LESS THAN]10-9/bit-day).
It has Single Event Upset (SEU) immunity and Total Dose tolerance in excess of 300 Krad.
The emergency occurred in mid-December and is believed to have been caused by a single event upset (SEU).
Preliminary testing of Actel's RadTolerant SX devices shows Total Dose (TD) radiation capability of up to 100K rads (Si) and Single Event Upset (SEU) to 1 x 10 to the -7th power upsets per bit-day.
In addition, the QL1P1000 is immune from Single Event Upsets (SEUs).
The latest release of the Synplify Premier software enhances its support for high reliability by giving designers the ability to address radiation effects such as single event upsets (SEUs) through multiple error mitigation techniques including localized and selective TMR implementation.
New Synplify tool capabilities improve error recovery and resistance to single event upsets (SEUs), increasing reliability of FPGAs deployed in the field - Enhanced graphical interface eases status monitoring and debugging in hierarchical design flows - Extended compatibility with Synopsys' Design Compiler tool and DesignWare IP for a robust ASIC prototyping solution
When compared to SRAM FPGAs, Microsemi's radiation-tolerant flash-based FPGAs have intrinsic configuration immunity to single event upsets (SEU), removing the need for board level mitigation schemes.
Providing a flexible alternative to expensive radiation-hardened ASICs, RTAX-DSP FPGAs feature up to 120 multiply-accumulate DSP mathblocks, protected against radiation-induced single event upsets (SEU) and single event transients (SET).
The S950 offers extreme protection against single event upsets (SEUs) making it ideal for a variety of low earth orbit (LEO), Mars terrestrial and geocentric orbit (GEO) applications including redundant mission computers and guidance and navigation computers as well as in command and data handling computers, solid-state recorders and video controllers.
ITT also leveraged Xilinx Design Services to assist with a portion of the project, including design mitigation for single event upsets (SEU) in space.
HardCopy II structured ASICs are well aligned for designs in military applications, providing high immunity to single event upsets (SEU), low device power and single-chip-live-at-power-up for use in avionics, missiles, modems, sensors, radios and unmanned vehicle applications.
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