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structured ASIC |
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structured ASICA type of application specific IC (ASIC) chip that contains blocks of logic, called "tiles" or "modules," that have their transistors already wired together forming gates along with some combination of multiplexors, flip/flops, look up tables and the like. Some vendors also include blocks of RAM. Unlike a standard cell, which requires all the masking stages in the transistors and metalization layers to be fabricated, structured ASICs require only one or two masks to tie the tiles together. In one design, only the vias need to be made conductive in order to complete the chip. See ASIC and via. How to thank TFD for its existence? Tell a friend about us, add a link to this page, add the site to iGoogle, or visit webmaster's page for free fun content. |
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ChipX, the Structured ASIC leader, has announced the CX6000 family of Structured ASICs. customers will be well supported by ChipX and will benefit from ChipX's Structured ASIC offering," said Masaharu Ozawa, President and COO of Oki Semiconductor. 95 for 30,000 logic cells and half the price of comparable Structured ASIC offerings. |
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