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Verilog |
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VerilogAn HDL (hardware description language) used to design electronic systems at the component, board and system level. Developed by Phil Morby at Gateway Design Automation, it was introduced in 1985 along with Verilog-XL, a logic simulator.
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| @Designer now supports the leading Verilog simulators, including NC-Verilog and Verilog-XL from Cadence (NYSE:CDN), Modelsim from Mentor Graphics (Nasdaq:MENT), and VCS from Synopsys (Nasdaq:SNPS). a leading provider of high-performance Verilog simulators announced support for variable precision computation in its Super FinSim Verilog simulators. Arithmatica has integrated Verific's Verilog parser and register transfer level (RTL) elaborator with its CellMath tools to provide tighter flow integration for Verilog users. |
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