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SMBus

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SMBus

This article is provided by FOLDOC - Free Online Dictionary of Computing (foldoc.org)

SMBus

(System Management BUS) An interface between the CPU and computer system components used for low-speed system management communications. Designed by Intel and introduced on its Xeon chips, SMBus is used among other things to send charging requirements to the CPU from the battery. SMBus includes a Processor Information ROM (PIROM) that contains data about the processor and an empty EEPROM that can be used by manufacturers and resellers to record usage and service information. For more information, visit www.smbus.org.
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References in periodicals archive
The PacketPresenter supports I2C, SPI, ASYNC, CAN, USB, Parallel, Sync Serial, 1-Wire, I2S, PS2, and SMBus busses.
SiByte processors are designed for maximum I/O throughput, with three 10/100/1000 Ethernet MACs, a 32-bit/66MHz PCI host bridge, HyperTransport Host Bridge, SMBus, GPIO, flash interface, interrupts, and DMA all integrated onto the single chip.
The CAPA880 also comes with a PCI Express Mini Card slot and a unique ZIO connector for an additional PCIe x1, USB 3.0, LPC and SMBus expansion buses, giving this SBC high expandability options to meet customer specific needs," said Product Manager Michelle Mi.
They are also often tied into the System Management Bus (SMBus) on the node being monitored, allowing remote monitoring of on-board sensors (such as voltage, temperature, fan speed, etc.).
Its functionality is easily operated via the simple command format of I2C (SMBus compatible) interface protocol.
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