Switch failures occur independently in a network with a failure rate of [lambda] for 2x2
crossbar switches (a reasonable estimate for [lambda] is about [10.sup.-6]per hour)
This ccNUMA DSM system has nodes (called hypernodes) consisting of SMPs with 16 (180MHz PA-8000) processors and up to 4GB of memory with 16Gb chips, Within a hypernode, processors and memory are connected through an 8 3 8 "bars" nonblocking
crossbar switch, in which each link can send and receive 960MB/sec in each direction.
The flow-control delay includes the latency of flow-control units, the
crossbar switch delay, and the virtual channel controller delay.
Each of these computing engines resides on a different arm of the
crossbar switch. Consequently, application software can break down its workload into tasks and assign each one to the appropriate processing element - graphics subsystem, CPU, or video compression - for execution in parallel.
NanoBridge produces a highly scalable 4x4
crossbar switch, without the use of circuit selecting transistors used in conventional switches.
If the
crossbar switch provides 3.5 MHz, the mixer output will be 30.5 MHz, which when divided by 10 equals 3.05 MHz.
There are high-speed connections between these partitions across the AS/400's internal
crossbar switch. In future OS/400 releases, probably OS/400 V4R5 with the Pulsar servers due in early 2000, dynamic reallocation of resources will be possible, but right now partitions are set w ith software and require a machine reboot to take effect.
The XP--1000 for both Unix and Windows NT features the new Alpha 21264 microprocessor supported by a system architecture built around the Tsunami
crossbar switch. This pairing of the world's hottest chip with a robust data--movement mechanism should make the XP--1000 the fastest uniprocessor system on the market and attractive to technical professionals running computationally demanding applications such as large CAD assembly modeling and finite element analysis.
A fully non-blocking
crossbar switch fabric minimizes latency within the switch to less than one microsecond.
Its Convex-derived HyperPlane
crossbar switch, and the new 440MHz PA 8500 chip, which equals Compaq's 600MHz Alpha 21264 in performance at the top end of the CPU charts, give it further advantages, says Illunminata.
It could handle a maximum of 56 incoming trunks and 60 agent positions using a standard
crossbar switch. The 2B ACD was introduced in 1973.