direct-coupled FET logic
direct-coupled FET logic
[də′rekt ¦kəp·əld ¦ef¦ē¦tē ′läj·ik] (electronics)
A logic gate configuration used with gallium arsenide field-effect transistors operating in the enhancement mode, whose low power consumption and circuit simplicity lead to high packing density and potential use in very large-scale integrated circuits. Abbreviated DCFL.
McGraw-Hill Dictionary of Scientific & Technical Terms, 6E, Copyright © 2003 by The McGraw-Hill Companies, Inc.
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