phase change memory
A non-volatile, random access memory (RAM) technology that was designed to replace flash memory and, ultimately, DRAM memory. Developed by Stanford Ovshinsky, reknowned for his inventions in memories and solar panels, "phase change RAM" (PRAM, PCRAM) and "chalcogenide RAM" (C-RAM) are other names for phase change memory (PCM).Electrical vs. Optical Phase Change
Phase change memory employs the same principle as rewritable optical discs (CD-RWs, DVD-RWs, etc.), in which the bit cell is either in an unstructured "amorphous" state or highly structured "crystalline" state, both of which are extremely stable. However, phase change memory uses electrical pulses to change the bit rather than the heat from a laser, and it is read by measuring the electrical resistance through the cell, not the reflection of the laser light (see phase change disc).
In addition, phase change memory cells are denser than optical disc cells, and they can hold more than one bit. Prototypes with several dozen bits per cell have been demonstrated.
Phase Change vs. Flash
Phase change memory eliminates many disadvantages of flash memory. Like DRAM and SRAM memory, any byte in phase change memory can be written; whereas, flash requires an entire block to be written. As the flash cell's elements (feature sizes) become smaller, its floating gate architecture becomes more problematic. However, the smaller the phase change cell, the denser and faster the phase change chip becomes. In addition, phase change memory handles millions of rewrites compared to hundreds of thousands for flash. See PCMS, phase change disc, chalcogenide glass and future memory chips.
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| Change the Phase of the Bit |
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| A long, medium-amplitude pulse creates a highly conductive crystalline bit in the memory cell. A short, high-amplitude pulse resets the bit back to an amorphous state, which is a poor conductor. |
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| Automatically Radiation Hardened |
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| Based on the Ovonyx phase change memory cell, this 4 megabit C-RAM (Chalcogenide RAM) memory chip from BAE Systems is shown in its package before it is covered and the leads are cut. Due to the huge resistance difference between a 1 and 0 in the memory cell (5K and 100K ohms), the chip is automatically "rad hard." External radiation cannot change the phase sufficiently enough to alter the value of the cell. (Image courtesy of BAE Systems, www.baesystems.com) |
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