supervisor mode

[′sü·pər‚vī·zər ‚mōd]

(computer science)

A method of computer operation in which the computer can execute all its own instructions, including the privileged instruction not normally allowed to the programmer, in contrast to problem mode.

supervisor mode

(Or "supervisor state") An execution mode on some processors which enables execution of all instructions, including privileged instructions. It may also give access to different a address space, to memory management hardware and to other peripherals. This is the mode in which the operating system usually runs.

Opposite: user mode.

This article is provided by FOLDOC - Free Online Dictionary of Computing (foldoc.org)

privileged mode

An operational state of software that has the highest priority. Also called the "supervisor mode" or "supervisor state," it is typically the mode in which the operating system runs, because it has access to all the resources in the computer. See privilege.

supervisor state

Typically associated with mainframes, it is a hardware mode in which the operating system executes instructions unavailable to an application program; for example, I/O instructions. Contrast with program state. See supervisor call.

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In the Supervisor mode, the system can select the optimum changes in the set points, based on the actual process conditions.

When the clock reaches 0.0 and the control system is in Supervisor mode and the rules are evaluated, the clock receives a value of 15 minutes, permitting the control system to ascertain the actual state of the process, calculating reasons for change and average values of the different process variables.

After the clock has again reached zero, it is possible to select the Supervisor mode of control.

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There are two sets of 16 general purpose registers (GPRs), one referenced by user mode programs and one by supervisor mode programs.

The recognition by the hardware of a trap or interrupt causes entry to a macro instruction sequence, INTRAP, which is noninterruptible mode performs a context switch to supervisor mode, stores the PC, PSW, and SSW on the supervisor stack, and transfers control to the trap or interrupt handler through the vector table.

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