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address decoder

   Also found in: Wikipedia 0.02 sec.

address decoder

A circuit that converts an address into the electrical signals required to retrieve the data from a memory cell, disk sector, cartridge library or other memory or storage device.



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3v, this device offers two NS16C550 high speed UARTS (Universal Asynchronous Receiver Transmitter) with send/receive 16 Byte FIFOs, ISA host interface, general purpose address decoder, multi-mode parallel port with ChiProtect(TM) and EPP/ECP support.
Both devices have 512 KBytes of flash, a second concurrent 32 KByte Flash Array, 8 KBytes of SRAM, a built-in configurable interface for 16-bit and 32-bit MCUs or DSPs, a programmable address decoder, and a small CPLD for chip selects, combinatorial logic and configurable pin-assignments.
The ZPSD6XX also has a built-in address decoder and MCU interface.
 
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