bit cell


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bit cell

A boundary in which a single bit is recorded on a tape or disk.
References in periodicals archive ?
Sidense's patented one-transistor bit cell also provides many advantages in security and reliability when compared to other types of non-volatile memory.
Decreasing the size of a bit cell by a factor of two quadruples the density.
Perhaps the most fundamental change Renaissance 2X brings is that it eliminates the need for specialized 8-transistor bit cell development.
They are pin-compatible with the company's MBM29DL family products, which are designed with the floating-gate single bit cell architecture, and customers can make the transition to high-density MirrorFlash products without major design changes.
We create a slightly smaller bit cell than what's standard," Campbell explained, "and we 'color' it by making the mark darker or lighter, in one of eight ratios of light to dark.
0-square-micron bit cell -- by far the smallest in the foundry industry," said Ed Wan, UMC vice president of worldwide field engineering.
The single transistor bit cell used in 1T-SRAM memory results in the technology achieving much higher density than traditional four or six transistor SRAMs while using the same standard logic manufacturing processes.
HSINCHU, Taiwan -- UMC, a leading global semiconductor foundry (NYSE:UMC) (TSE:2303), today announced that it has successfully produced functional 45-nanometer (nm) SRAM chips that feature an impressive bit cell size of less than 0.
The single transistor bit cell used in 1T-SRAM memory results in the technology achieving much higher density than traditional six transistor SRAMs while using the same standard logic manufacturing processes.
With the implementation of MoSys-patented 1T-SRAM memory technology and 1T-Q bit cell to Fujitsu's 65nm process, Fujitsu is able to offer complex SoCs that have a fraction of the die area devoted to embedded memory compared to other competing embedded memory technologies, while maintaining very high performance with extremely low power consumption.
The multi-megabit, highly integrated devices have been in volume production since June/2006, and are manufactured using MoSys's 1T-Q(R) advanced bit cell technology for its embedded memory on TSMC's 0.
The ASAP Memory HS's high-performance architecture begins with the design of its bit cells, which are optimized for fast signal propagation, with the lowest possible bit-line coupling for very high stability.