chip package


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chip package

The housing that chips come in for plugging into (socket mount) or soldering onto (surface mount) the printed circuit board. Creating a mounting for a chip might seem trivial to the uninitiated, but chip packaging is a huge and complicated industry. The ability to provide more and more I/O interconnections to a die (bare chip) that is increasingly shrinking in size is an ever-present problem. In addition, the smaller size of the package contributes as much to the miniaturization of cellphones and other handheld devices as the shrinking of the semiconductor circuits. See BGA, CDIP, CERDIP, CERQUAD, CLCC, DIP, flatpack, package on package, PLCC, QFP, MCM, MCP, SOP, SOIC, SOJ, TSOP and ZIP.
References in periodicals archive ?
In the Wafer Technology Consortium launched in 2002 with 10 participating companies, the research team demonstrated for the first time a reliable flip chip package for copper/ultra-low-k devices.
This requires higher capacity memory, particularly that afforded by multiple chip package designs.
The Paper Thin Package (PTP) technology reduces the size of stacked chip packages by shrinking the width of the individual stacked ICs.