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clocked flip-flop |
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clocked flip-flop [′kläkt ′flip‚fläp] (electronics) A flip-flop circuit that is set and reset at specific times by adding clock pulses to the input so that the circuit is triggered only if both trigger and clock pulses are present simultaneously. How to thank TFD for its existence? Tell a friend about us, add a link to this page, add the site to iGoogle, or visit webmaster's page for free fun content. |
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