die shrink


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die shrink

Reducing the size of the elements on a chip without changing its fundamental circuit design. In a die shrink, the internal design of the transistor may or may not be the same. For example, when the Intel Sandy Bridge microarchitecture was superseded by Ivy Bridge, the circuit design remained the same, but the transistors were entirely different. See half node and microarchitecture.
References in periodicals archive ?
Intel offers a true die shrink with its second-generation 14 nm Tri-Gate process, relative to alternative FinFET technologies.
The die shrink will offer backward compatibility and performance enhancement, while achieving the common targets shared with customers on cost control," said Martin Lin, Segment Marketing Director at Macronix.
It's functionally the same ASIC [as the Bloom I] but we've done a die shrink," said Brocade's marketing vice president Jay Kidd.
Die shrink has led to cost reductions; TriQuint pioneered in this area," said Balut.
The Mali55 is a die shrink of the Mali110, allowing for advanced multimedia capabilities for the value market.
As well, this analysis reveals that the 970FX delivers a 50% die shrink (to 65mm2) over its 130nm predecessor, including the 6-T SRAM cell size.
The lower density was achieved through a die shrink - which allowed use of a smaller 44-pin QFP with tighter lead spacing.
Pad pitch reduction in the bonding process is especially critical in meeting today's die shrink challenges, an important component in lowering costs in semiconductor manufacturing.
Creating interconnect on top of the die placed in a reconstituted wafer format permitted a package structure that could handle higher I/Os, as the move to advanced silicon technology nodes provided die shrinks.
However, the company believes the industry went through a paradigm shift during the past recession, moving to more aggressive die shrinks and to 300 mm processing to increase production.