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direct-coupled FET logic |
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direct-coupled FET logic [də′rekt ¦kəp·əld ¦ef¦ē¦tē ′läj·ik] (electronics) A logic gate configuration used with gallium arsenide field-effect transistors operating in the enhancement mode, whose low power consumption and circuit simplicity lead to high packing density and potential use in very large-scale integrated circuits. Abbreviated DCFL. How to thank TFD for its existence? Tell a friend about us, add a link to this page, add the site to iGoogle, or visit webmaster's page for free fun content. |
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