gate array

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gate array

A type of ASIC chip that is partially finished with rows of the transistors and resistors built in but unconnected. The chip is completed by designing and adhering the top metal layers that provide the interconnecting pathways. These final masking stages are less costly than designing a full custom chip from scratch, which requires a new photo-mask for every transistor and interconnection layer.

The gate array is made up of "basic cells," each cell containing some number of transistors and resistors depending on the vendor. Using a cell library (gates, registers, etc.) and a macro library (more complex functions), the customer designs the chip, and the vendor's software generates the interconnection masks. Some cells go wasted on gate array designs, which is the penalty for having fixed locations for everything. See PLD, ASIC, hard macro and soft macro.


Gate Array Cells
These are examples of basic cells used in gate arrays. One uses CMOS logic only (NMOS and PMOS transistors), while the other adds bipolar transistors for higher output power.
References in periodicals archive ?
Original equipment manufacturers (OEMs) across the Globe are increasingly moving away from application-specific integrated circuits towards field programmable gate arrays to reduce the time to market
This transaction will boost ChipX's ASIC team capabilities and enable it to become a broad-based ASIC company with a broad product offering of embedded arrays, gate arrays, structured ASICs and standard cell ASICs.
The research, "Field-Programmable Gate Arrays (FPGAs): Expanding Its Boundaries" (#IN0603187SI), covers the worldwide FPGA market.
a leading provider of development software for Field Programmable Gate Arrays (FPGAs), today announced the appointment of Kurt Dobson as chief executive officer.
Lattice Semiconductor Corporation provides the industry's broadest range of Field Programmable Gate Arrays (FPGA) and Programmable Logic Devices (PLD), including Field Programmable System Chips (FPSC), Complex Programmable Logic Devices (CPLD), Programmable Mixed-Signal Products (ispPAC(R)) and Programmable Digital Interconnect Devices (ispGDX(R)).
Nasdaq:LSCC), a provider of the industry's broadest range of field programmable gate arrays (FPGAs) and programmable logic devices (PLDs), today announced the qualification of NexFlash(R) spiFlash(TM) Serial Flash memories for use with the LatticeECP(TM) and LatticeEC(TM) field-programmable gate array (FPGA) family.
Structured application specific integrated circuits (ASIC) is currently the most viable design technology in the semiconductor chip market -- a paradigm shift from the gate arrays and cell-based ASIC that dominated the market previously.
The HCDR-1000 is a flexible heterogeneous processing platform that incorporates Xilinx(TM) field programmable gate arrays, IBM and Motorola PowerPC(TM) processors and Texas Instruments digital signal processors.
The Cray XD1 system strongly exploits high volume technologies such as AMD Opteron(TM) processors and HyperTransport(TM) technology, as well as the Linux operating system, while innovating with a high performance system interconnect known as RapidArray(TM), an automated management infrastructure, and the opportunity to accelerate application performance through the use of field programmable gate arrays.
Faster Time to Market for NEC Electronics' Gate Arrays
is an electronic design automation (EDA) industry newcomer creating the next EDA beachhead by helping fuel the movement from application specific integrated circuits (ASICs) to high-speed, high-complexity field programmable gate arrays (FPGAs).
is a featured panelist at the ACM/SIGDA 11th International Symposium on Field Programmable Gate Arrays (FPGAs) to be held February 22-24 at the Monterey Beach Resort in Monterey, Calif.