half-node

half-node

A process technology that reduces the size of the chip without redesigning the circuits to fit into the smaller area. Normally, when shrinking a chip to a smaller die size, some of the circuit design has to be reworked. The half-node is different because the fundamental architecture remains the same but only the real estate has been shrunk. For example, in 2008, Altera introduced an FPGA with a 40 nm half-node: 5 nm less than the standard 45 nm. This 11% reduction in size reduced power consumption. See process technology.
References in periodicals archive ?
This collaboration extends upon the long-standing relationship between TSMC and NetLogic Microsystems on the use of advanced cost-effective half-node technologies, including 55nm, 80nm and 110nm.
N28 routing rules - Provides 28nm support for the complete netlist-to-GDSII flow, including support for the 28nm transparent half-node.
Technologies that enable design readiness include: low power design and verification provided by the Eclypse(TM) Low Power Solution using the industry standard Unified Power Format (UPF); advanced Design-for-Test (DFT) capabilities; complete 40-nm design rule support for place-and-route; transparent half-node design flow; statistical leakage analysis; and enhanced design-for-manufacturing (DFM) capabilities.
0 addresses new design challenges of TSMC's advanced technologies up to and including 40nm process technology, with features such as transparent half-node design, support for new low power automation flow via Unified Power Format (UPF) in addition to Common Power Format (CPF) enabled flow, new statistical design features, and hierarchical DFM capability.
0 delivers transparent half-node designs, eliminating the need for designers to define the half-node scaling factor multiple times in different tools throughout whole design cycle in order to migrate a design from a full node to a "shrink" node by traditional design flows.
Power noise analysis with RedHawk qualified for transparent half-node design
As a result, NetLogic Microsystems is now positioned to efficiently design other advanced products for the 55nm node and enjoy the benefits of this half-node across multiple products.
This achievement extends upon the existing collaboration between TSMC and NetLogic Microsystems on the use of advanced cost-effective half-node technologies, including 110nm and more recently the 80nm process, which was announced in Feb.
We are excited to once again work closely with NetLogic Microsystems as one of the lead customers for our advanced half-node processes.
TSMC's half-node strategy has a proven track record of helping customers achieve a crucial edge in a fiercely competitive marketplace.
TSMC offers the half-node as an extra option to our customers," said Jason Chen, Vice President of Corporate Development for TSMC.
NVIDIA and TSMC have a longstanding strategic collaboration involving half-node technologies," said Chris Malachowsky, Senior Vice President of Engineering and Operations, NVIDIA.