5 milliwatts (mW) per million instructions per second
9 Dhrystone million instructions per second
(MIPS) per megahertz (MHz), efficient RISC CPU core with five-stage pipeline and CISC instructions, and low power consumption.
All three Optimum multi-lane terminals are built around a 200Mhz 32-bit Intel[R] XScale[R] processor that delivers industry-leading speeds and processing capabilities of 250 million instructions per second
(MIPS), a quantum leap over the 1.
The TMS320DA610, which is part of TI's Aureus(TM) family of audio DSPs, is a 225 MegaHertz (MHz) floating point DSP that delivers 1800 million instructions per second
(MIPS) and 32/64-bit native processing.
NASDAQ:MCHP), a leading provider of microcontroller and analog semiconductors, today announced that it continues the production rollout of its 16-bit product portfolio with a new dsPIC(R) Digital Signal Controller (DSC) that offers designers a performance speed of 30 million instructions per second
(MIPS), self-programming capabilities via Flash memory, and industrial and extended temperature ranges.
The initial device in a new product family, the VR5500 processor delivers 600 million instructions per second
(MIPS) at 300 MHz, achieving one of the highest MIPS per MHz ratios in the industry.
As a low-cost advantage, the LSI403Z operates at just pennies per million instructions per second
(MIPS) and is one of the most cost-effective solutions under ten dollars on the market today.