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scan design

   Also found in: Wikipedia 0.09 sec.
(electronics)scan design - (Or "Scan-In, Scan-Out") A electronic circuit design technique which aims to increase the controllability and observability of a digital logic circuit by incorporating special "scan registers" into the circuit so that they form a scan path.

Some of the more common types of scan design include the multiplexed register designs and level-sensitive scan design (LSSD) used extensively by IBM. Boundary scan can be used alone or in combination with either of the above techniques.

["Digital Systems Testing and Testable Design" by Abramovici, Breuer, and Friedman, ISBN 0-7167-8179-4].

["Design of Testable Logic Circuits" by R.G. Bennetts, (Brunel/Southhampton Universities), ISBN 0-201-14403-4].


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A[micro] Acronyms: A[micro] ATE: Automatic Test Equipment A[micro] ATPG: Automatic Test Program Generation A[micro] BIST: Built-In Self Test A[micro] BSD: Boundary Scan Design A[micro] DFD: Design for Debug/Diagnosis A[micro] DFT: Design For Test
DFTAdvisor automatically adds test logic to correct problems with design testability, providing control of such things as internally-generated clocks, sets and resets which do not comply with scan design rules.
In other words, the larger the scan design, the larger the saving in simulation time when using TDS_SimValidator DAS mode.
 
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