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scan technology |
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scan technologyA method for testing chips on the printed circuit board by building the chip with additional input and output pins that are used only for test purposes. Full scan methods test all the registers on the chip. Partial scan tests some of them, and boundary scan tests only the input/output cells. JTAG is the IEEE standard for boundary scan. See also scan rate. How to thank TFD for its existence? Tell a friend about us, add a link to this page, add the site to iGoogle, or visit webmaster's page for free fun content. |
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Today's tape backup devices ("drives") are being built around one of two technology platforms: linear recording or helical scan technology. Nick VandenBrekel, CEO of Sequiam, said: "I am absolutely thrilled with the official introduction of the Smart Scan technology. To capitalize effectively on the many benefits of boundary scan technology, JTAG should be a consideration during the design of circuit boards and chips," said Alan Sguigna, vice president of sales and marketing for ASSET. |
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