Contour is the creator of Diode Transistor Memory
(DTM(TM)), the first new non-volatile memory technology to address the fundamental cost challenges associated with building a NAND fabrication facility today, backed by 45 issued and/or allowed patents and more than two dozen patent applications in process.
Diode Transistor Memory
(DTM(TM)) technology, the world's lowest production cost non-volatile memory technology, is backed by 45 issued and/or allowed patents and more than two dozen patent applications in process.
In 2002, he co-founded Innovative Silicon, developing a new floating-body single transistor memory
a leading developer of non-volatile memory technologies, today announced it has been awarded three new patents to back its Diode Transistor Memory
(DTM(TM)) technology, the world's lowest production-cost, non-volatile memory technology.
Top Z-RAM Technologist Driving the Next Frontier in Ultra-Dense, Single Transistor Memory
will reveal details about the company's development of Diode Transistor Memory
(DTM(TM)) technology, the world's lowest production-cost, non-volatile memory technology at the upcoming Flash Memory Summit during the panel "Life Beyond Flash: New Non-Volatile Memory Technologies," Thursday August 7 at 8:30 a.
For years, companies have been struggling to commercialize the benefits of floating body memory, which promises a true single transistor memory
cell - the smallest, densest, and fastest type of memory possible.
Robert Heath Dennard: Field-Effect Transistor Memory
DRAM, inducted 1997
With HSIM, we were able to simulate the 60M transistor memory
design in 18 hours with full parasitics, and in only 15 minutes with acceptable timing accuracy using HSIM parasitic reduction techniques.
Z-RAM's one transistor memory
bitcell is made possible by harnessing the Floating Body Effect (FBE) found in circuits fabricated using SOI (silicon-on-insulator) wafers.
In 2002 he co-founded Innovative Silicon, developing a new SOI single transistor memory
In leading-edge process geometries, 1T-SRAM can lower standby power and help avoid the increasing bitcell leakage of six transistor memory
designs for the very demanding requirements of next generation cellular designs and other mobile products.