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twos complement

   Also found in: Wikipedia 0.01 sec.
(data)twos complement - A system used in some computers to represent negative numbers in binary. Each bit of the number is inverted (zeros are replaced with ones and vice versa), as for ones complement, but then one (000...0001) is added (ignoring overflow). This avoids the two representations for zero found in ones complement by using all ones to represent -1.

... 000...00011 = +3 000...00010 = +2 000...00001 = +1 000...00000 = 0 111...11111 = -1 111...11110 = -2 111...11101 = -3 ...

This representation simplifies the logic required for addition and subtraction, at the expense of a little extra complexity for negation.


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The MSM7716 3-volt linear CODEC utilizes a 14-bit, twos complement input/output coding format, saving up to 2 MIPS normally used in PCM processing by a DSP.
 
 
 
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