vertical metal oxide semiconductor technology

vertical metal oxide semiconductor technology [′vərd·ə·kəl ¦med‚əl ¦äk‚sīd ¦sem·i·kən‚dək·tər tek′näl·ə·jē]

(electronics)

For semiconductor devices, a technology that involves essentially the formation of four diffused layers in silicon and etching of a V-shaped groove to a precisely controlled depth in the layers, followed by deposition of metal over silicon dioxide in the groove to form the gate electrode. Abbreviated VMOS technology.