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zero wait state

   Also found in: Wikipedia, Hutchinson 0.09 sec.

Refers to a high-speed memory that transfers its data immediately upon being accessed without waiting one or more machine cycles to respond.
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Performance - The PP5022 features a highly parallel media processing architecture that integrates dual 32-bit ARM7 central processing units (CPUs) with zero wait state four-port 128 kilobytes iRAM and six direct memory access (DMA) channels connected through multiple high-speed internal buses.
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An integrated 32-byte bi-directional FIFO buffer memory supports zero wait state burst operation or programmable wait states from zero through seven.
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architecture provides zero wait state, scatter gather
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