Joint Test Action Group

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Joint Test Action Group

(architecture, body, electronics, integrated circuit, standards, testing)
(JTAG, or "IEEE Standard 1149.1") A standard specifying how to control and monitor the pins of compliant devices on a printed circuit board.

Each device has four JTAG control lines. There is a common reset (TRST) and clock (TCLK). The data line daisy chains one device's TDO pin to the TDI pin on the next device.

The protocol contains commands to read and set the values of the pins (and, optionally internal registers) of devices. This is called "boundary scanning". The protocol makes board testing easier as signals that are not visible at the board connector may be read and set.

The protocol also allows the testing of equipment, connected to the JTAG port, to identify components on the board (by reading the device identification register) and to control and monitor the device's outputs.

JTAG is not used during normal operation of a board.

JTAG Technologies B.V..

Boundary Scan/JTAG Technical Information - Xilinx, Inc..

Java API for Boundary Scan FAQs - Xilinx Inc..

JTAG Boundary-Scan Test Products - Corelis, Inc..

"Logic analyzers stamping out bugs at the cutting edge", EDN Access, 1997-04-10.

IEEE 1149.1 Device Architecture - Boundary-Scan Tutorial from ASSET InterTech, Inc..

"Application-Specific Integrated Circuits", Michael John Sebatian Smith, published Addison-Wesley - Design Automation Cafe.

Software Debug options on ASIC cores - Embedded Systems Programming Archive.

Designing for On-Board Programming Using the IEEE 1149.1.

Built-In Self-Test Using Boundary Scan by Texas Instruments - EDTN Network.
This article is provided by FOLDOC - Free Online Dictionary of Computing (
References in periodicals archive ?
An IEEE 1149.1 test access port (TAP) provides external access to the IJTAG network and primarily is used within the manufacturing test environment.
spectrum showed characteristics bands of bis-p-MPPE is [gamma] -C-H [Aromatic ring] = 2882.5 [cm.sup.-1], [gamma] -OH = 3449.3 [cm.sup.-1], [gamma]- P=O = 1745.9 [cm.sup.-1], [gamma] -C=C-C=C- = 1518.7 [cm.sup.-1], [gamma] -P-O = 1386.1 [cm.sup.-1], [gamma]-C-O= 1149.1 [cm.sup.-1], [gamma]-C-H [outofplane bending] = 1040-936 [cm.sup.-1], characterised the structure of bis-p-methoxyphenyl phosphate.
BOUNDARY SCAN OR JTAG (Joint Test Action Group) is an IEEE Standard 1149.1 that defines the test access port and boundary scan architecture of digital integrated circuits.
First, and chief among them, is that related to the IEEE 1149.1 standard.
Texas Instruments Incorporated (TI) (NYSE:TXN ) , a key member of the IEEE working group, announced that it is driving the ratification of the IEEE 1149.7 standard, a new two-pin test and debug interface standard that supports half the number of pins of the IEEE 1149.1 technology, allowing developers to easily test and debug products with complex digital circuitry, multiple CPUs and applications software in products such as mobile and handheld communication devices.
Peripheral interfaces featured on the board reportedly include: Video Input: 4 Channel SD/1-Channel Component HD/HDMI; Video Output: HDMI or HD/SD Component Video; Network interface: 10/100/1000 Mb/s Ethernet, 802.11b/g wireless (Optional); as well as audio I/O, 10/100/1000 Mb/s Ethernet, USB 2.0, SPI (2-Chip selects), PCI 2.3, HDD (ATA/ATAPI - 6 Interface), VLYNQ, RS232, RS485, IrDA, RTC, GPIO (up to 12 with TTL level) and JTAG (IEEE 1149.1) interfaces.
It provides a standard five-signal 1149.1 JTAG test port for boundary scan test purposes.
The weight of the birds (g) was superior (P < 0.05) for Dical (1149.1), Liza (973.6) and Rio (966.0), these in turn were higher (P < 0.05) than Chigua (896.3), Navay (862.3), Monte (853.0) and Jaji (829.9).
Meanwhile, other vendors of programmable logic devices can use the open Java API for Boundary Scan for online configuration, using the IEEE's 1149.1 JTAG port.