process technology

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process technology

The particular manufacturing method used to make silicon chips, which is measured by how small the transistor is. The driving force behind the design of integrated circuits is miniaturization, and process technology boils down to the never-ending goal of smaller. It means more computing power per square inch, and smallness enables the design of ultra-tiny chips that can be placed almost anywhere.

Feature Size Measured in Nanometers
The size of the features (the elements that make up the structures on a chip) are measured in nanometers. A 22 nm process technology refers to features 22 nm or 0.22 µm in size. Also called a "technology node" and "process node," early chips were measured in micrometers (see table below).

Historically, the feature size referred to the length of the silicon channel between source and drain in field effect transistors (see FET). Today, the feature size is typically the smallest element in the transistor or the size of the gate.

From 1,000 Down to 90
The feature size of the 486 chip in 1989 was 1,000 nm (one micron). By 2003, it was 90 nm, reduced by a little less than one millionth of a meter. What may seem like a minuscule reduction took thousands of man years and billions of dollars worth of R&D. In the table below, note the dramatic reductions in the early years of semiconductors.

Chips Are a Miracle of Miniaturization
To understand how tiny these features are, using 22 nm as an example, four thousand of them laid side-by-side are equal to the cross section of a human hair. See half-node and active area.


Half a Micron Is Huge
In a span of five years, the feature size on these AMD chips was reduced from .8 to .35 microns. Half a micron may seem insignificant, but not in the microminiature world of semiconductor manufacturing. As features get smaller, the chip runs faster and uses less energy to perform the same processing. (Image courtesy of Advanced Micro Devices, Inc.)





Semiconductor Feature Sizes(approximate for all vendors)       Nanometers  MicrometersYear     (nm)        (µm)

 1957   120,000      120.0
 1963    30,000       30.0
 1971    10,000       10.0
 1974     6,000        6.0
 1976     3,000        3.0
 1982     1,500        1.5
 1985     1,300        1.3
 1989     1,000        1.0
 1993       600        0.6
 1996       350        0.35
 1998       250        0.25
 1999       180        0.18
 2001       130        0.13
 2003        90        0.09
 2005        65        0.065
 2008        45        0.045
 2010        32        0.032
 2012        22        0.022
 2014        14        0.014
 2017        10        0.010
  ??          7        0.007
  ??          5        0.005

 Future
 Non-Silicon
 Method       1        0.001
References in periodicals archive ?
Currently, the industry uses 193-nanometer-wave-length laser radiation to make wires and other circuit parts as thin as 90 nm.
TELECOMWORLDWIRE-21 July 2005-Marvell introduces 90 nm WLAN chip(C)1994-2005 M2 COMMUNICATIONS LTD http://www.
By combining efforts, alliance members have achieved several milestones in 90 nm production and 65 nm process development.
Built with the most advanced triple-oxide 90 nm process technology and the widest range of embedded IP blocks, the Virtex-4 family reduces power consumption by 50% compared to previous generation.
Engineering teams from the two companies have been working closely together to port the processor design to Fujitsu's CS100 90 nm complementary metal oxide semiconductor (CMOS) process, which features transistors with a 40 nm physical gate length.
SAXS measurements were performed at the Advanced Photon Source at Argonne National Laboratory on test arrays of lithographically prepared structures with dimensions spanning 90 nm to 300 nm with a precision on the order of 0.
a provider of synthesizable full-custom analog intellectual property (IP), plans to develop products at the 90 nm technology node.
The 90 nm process will be ramped into high volume in Intel's 300 mm development fab in Hillsboro, Oregon, and then transferred to Ireland and other 300mm manufacturing fabs sometime next year.
These new semi conductors, which will use CMOS 90 nm (nanometre) technology, permit significant improvements in terms of speed, density and integration for thousands of electronic devices by comparison with 0.
An enhancement of 40-65% for the PFET was demonstrated on a 90 nm node CMOS technology.
Recently NIST researchers have demonstrated superconformal electrodeposition of copper in 500 nm deep trenches ranging from 500 nm to 90 nm in width using an acid cupric sulfate electrolyte containing chloride (Cl), polyethylene glycol (PEG), and 3-mercapto-1-propanesulfonate (MPSA).